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| author | Kan Liang <kan.liang@linux.intel.com> | 2020-10-19 08:35:25 -0700 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2020-10-29 11:00:39 +0100 |
| commit | b14d0db5b8c86507c9810c1c8162c7d4a3c656bd (patch) | |
| tree | c04ab1e77bf7ea65f40bab1fa8f3936a4f8e5e52 /tools/perf/scripts/python/failed-syscalls-by-pid.py | |
| parent | 51b646b2d9f84d6ff6300e3c1d09f2be4329a424 (diff) | |
perf/x86/intel: Add Rocket Lake CPU support
From the perspective of Intel PMU, Rocket Lake is the same as Ice Lake
and Tiger Lake. Share the perf code with them.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20201019153528.13850-1-kan.liang@linux.intel.com
Diffstat (limited to 'tools/perf/scripts/python/failed-syscalls-by-pid.py')
0 files changed, 0 insertions, 0 deletions