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authorMartin Blumenstingl <[email protected]>2023-03-07 23:26:49 +0100
committerGreg Kroah-Hartman <[email protected]>2023-03-09 17:21:02 +0100
commitadd5dfe87abe962cf9884193d9467f23d898fb8b (patch)
tree3df7c43b0c207e143e46a284b9893e10fadb5e36 /tools/perf/scripts/python/failed-syscalls-by-pid.py
parentcb46a3e2d6b8e937f44f73a6991f7e3d60008449 (diff)
dt-bindings: serial: amlogic,meson-uart: Add compatible string for G12A
Amlogic G12A SoCs gained a new "divide XTAL by 2" bit. Everything else (we know about) is identical to the UART IP on GX (GXBB/GXL/GXM) SoCs. Add a new compatible string for this SoC so this new bit can be managed accordingly while keeping "amlogic,meson-gx-uart" as fallback compatible string. Signed-off-by: Martin Blumenstingl <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
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