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authorGeert Uytterhoeven <geert+renesas@glider.be>2024-07-22 13:50:29 +0200
committerGeert Uytterhoeven <geert+renesas@glider.be>2024-07-30 10:44:18 +0200
commit4c63e9a13560fef7fd42b45f58687b400b958e3c (patch)
treefb5f2dd3255f579ffc3a4ffea26488f737ebfebe /tools/perf/scripts/python/failed-syscalls-by-pid.py
parent732a6108ef5eb5fe6b961295d91d80991d724c06 (diff)
clk: renesas: r8a779a0: Use defines for PLL control registers
Add symbolic definitions for the various PLL control registers. Replace hardcoded register offsets by the new definitions. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/8cac464c7dfb15ecd299b8ab4ba88a16135f8123.1721648548.git.geert+renesas@glider.be
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