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| author | Karthikeyan Krishnasamy <karthikeyan@linumiz.com> | 2024-09-12 19:54:48 +0530 |
|---|---|---|
| committer | Alexandre Belloni <alexandre.belloni@bootlin.com> | 2024-09-18 10:48:10 +0200 |
| commit | 4015580e983daa699d7e1693328dd81f0e295589 (patch) | |
| tree | 4ca7c97581959f5ea9312fb771b0b541b56ee1f7 /tools/perf/scripts/python/failed-syscalls-by-pid.py | |
| parent | 60a06efc56d7d336d13fae58f9e90c8a4e21619e (diff) | |
dt-bindings: rtc: microcrystal,rv3028: add #clock-cells property
RV3028 RTC has a clock out features, the clk out can be
controlled using clkout register, to consume the clock out
from rv3028 '#clock-cells' property is added.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Karthikeyan Krishnasamy <karthikeyan@linumiz.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20240912142451.2952633-4-karthikeyan@linumiz.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Diffstat (limited to 'tools/perf/scripts/python/failed-syscalls-by-pid.py')
0 files changed, 0 insertions, 0 deletions