drm/i915/gen9: Add 2us read latency to WM level

According to the updated Bspec, The mailbox response data is not currently
accounting for memory read latency. Add 2 microseconds to the result for
each level.
This patch adds 2us to latency of level 0 for all cases and
for all other levels (1-7) only if latency[level] > 0.

v2: Slightly rework the patch and add a big comment (Damien)
v3: Rebase on top of the renames of the memory latency defines

Signed-off-by: Vandana Kannan <[email protected]> (v1)
Signed-off-by: Damien Lespiau <[email protected]>
Reviewed-by: Ville Syrjälä <[email protected]> (v2)
Reviewed-by: M, Satheeshakrishna <[email protected]> (v1)
Cc: Lespiau, Damien <[email protected]>
Cc: M, Satheeshakrishna <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>

0 files changed, 0 insertions, 0 deletions