diff options
| author | Arun Siluvery <[email protected]> | 2016-01-21 21:43:50 +0000 |
|---|---|---|
| committer | Daniel Vetter <[email protected]> | 2016-01-25 16:48:28 +0100 |
| commit | 2c8580e4e21c17011e78e7ac4e1fbab8b0d632bf (patch) | |
| tree | 45bdc13d115b60f7597d4010e1978175418ccc91 /tools/perf/scripts/python/failed-syscalls-by-pid.py | |
| parent | 3669ab6191b24ee800a5f78d3748b7d96df12115 (diff) | |
drm/i915/bxt: Add GEN9_CS_DEBUG_MODE1 to HW whitelist
Required for,
WaDisableObjectLevelPreemptionForTrifanOrPolygon:bxt
WaDisableObjectLevelPreemptionForInstancedDraw:bxt
WaDisableObjectLevelPreemtionForInstanceId:bxt
According to WA database these are only applicable for BXT:A0 but since
A0 and A1 shares the same GT these are extended for A1 as well.
These are also required for SKL until B0 but not adding them because they
are pre-production steppings.
This register is added to HW whitelist to support WA required for future
enabling of pre-emptive command execution, WA implementation will be in
userspace and it cannot program this register if it is not on HW whitelist.
v2: use lower case in register defines (Nick)
v3: explain purpose of changes (Chris)
Reviewed-by: Nick Hoath <[email protected]>
Signed-off-by: Arun Siluvery <[email protected]>
Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
Signed-off-by: Daniel Vetter <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/failed-syscalls-by-pid.py')
0 files changed, 0 insertions, 0 deletions