diff options
| author | Aditya Swarup <[email protected]> | 2020-03-18 18:59:41 -0700 |
|---|---|---|
| committer | Manasi Navare <[email protected]> | 2020-03-27 16:30:24 -0700 |
| commit | 106d4ffd6cb8f15f3b66c0f64c16dfeda4f395e2 (patch) | |
| tree | 5da0f9a6ea005df9b848222f41bc62e3d57ab458 /tools/perf/scripts/python/failed-syscalls-by-pid.py | |
| parent | 35f3fd8182ba26e766f7b814e903acf19d01bbb5 (diff) | |
drm/i915/tgl: Add definitions for VRR registers and bits
Add definitions for registers grouped under Transcoder VRR function
with necessary bitfields.
Bspec: 49268
v2: Use REG_GENMASK, correct tabs/space indentation and move the
definitions near the transcoder section.(Jani)
v3: Remove unnecessary prefix from bit/mask definitions.(Manasi)
v4: Use 'trans' in macro for better readability.(Manasi)
Cc: Manasi Navare <[email protected]>
Cc: Jani Nikula <[email protected]>
Cc: Ville Syrjala <[email protected]>
Cc: Matt Roper <[email protected]>
Signed-off-by: Aditya Swarup <[email protected]>
Reviewed-by: Manasi Navare <[email protected]>
Signed-off-by: Manasi Navare <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/failed-syscalls-by-pid.py')
0 files changed, 0 insertions, 0 deletions