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| author | Andre Przywara <andre.przywara@arm.com> | 2017-03-07 01:17:48 +0800 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-03-27 13:40:53 +0200 |
| commit | 0127216f2217e63fcf976343d1504d2ba1d83a45 (patch) | |
| tree | 0985fb82b64e5aad379e8558b05d68f539176e37 /tools/perf/scripts/python/failed-syscalls-by-pid.py | |
| parent | a0f4e1836b3d83cf8270533870a96e87674655f2 (diff) | |
arm: sun8i: h3: split Allwinner H3 .dtsi
The new Allwinner H5 SoC is pin-compatible to the H3 SoC, but with the
Cortex-A7 cores replaced by Cortex-A53 cores and the MMC controller
updated. So we should really share almost the whole .dtsi.
In preparation for that move the peripheral parts of the existing
sun8i-h3.dtsi into a new sunxi-h3-h5.dtsi.
The actual sun8i-h3.dtsi then includes that and defines the H3 specific
parts on top of it.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[Icenowy: also split out mmc and gic, as well as pio and ccu's
compatible, and make drop of skeleton into a seperated patch]
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'tools/perf/scripts/python/failed-syscalls-by-pid.py')
0 files changed, 0 insertions, 0 deletions