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authorPali Rohár <pali@kernel.org>2021-11-25 13:46:00 +0100
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2022-01-04 14:59:07 +0000
commitf587775828219d4e2d7a796c7fff97e50c7f76f1 (patch)
tree180b69004f591d0f272936becd52c8792463ecf9 /tools/perf/scripts/python/exported-sql-viewer.py
parentdf08ac016124bd88b8598ac0599d7b89c0642774 (diff)
PCI: mvebu: Set PCI Bridge Class Code to PCI Bridge
The default value of Class Code of this bridge corresponds to a Memory controller, though. This is probably relict from the past when old Marvell/Galileo PCI-based controllers were used as standalone PCI device for connecting SDRAM or workaround for PCs with broken BIOS. Details are in commit 36de23a4c5f0 ("MIPS: Cobalt: Explain GT64111 early PCI fixup"). Change the Class Code to correspond to a PCI Bridge. Add comment explaining this change. Link: https://lore.kernel.org/r/20211125124605.25915-11-pali@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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