diff options
| author | Roman Guskov <rguskov@dh-electronics.com> | 2020-12-21 13:35:32 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2020-12-21 17:18:52 +0000 |
| commit | a590370d918fc66c62df6620445791fbe840344a (patch) | |
| tree | 3974e762369f18c4e2ccf7fda522d98d10924327 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | 17fa81aa702ec118f2b835715897041675b06336 (diff) | |
spi: stm32: FIFO threshold level - fix align packet size
if cur_bpw <= 8 and xfer_len < 4 then the value of fthlv will be 1 and
SPI registers content may have been lost.
* If SPI data register is accessed as a 16-bit register and DSIZE <= 8bit,
better to select FTHLV = 2, 4, 6 etc
* If SPI data register is accessed as a 32-bit register and DSIZE > 8bit,
better to select FTHLV = 2, 4, 6 etc, while if DSIZE <= 8bit,
better to select FTHLV = 4, 8, 12 etc
Signed-off-by: Roman Guskov <rguskov@dh-electronics.com>
Fixes: dcbe0d84dfa5 ("spi: add driver for STM32 SPI controller")
Reviewed-by: Marek Vasut <marex@denx.de>
Link: https://lore.kernel.org/r/20201221123532.27272-1-rguskov@dh-electronics.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions