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| author | Sergey Shtylyov <s.shtylyov@omprussia.ru> | 2021-02-28 23:26:34 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2021-03-01 13:22:34 -0800 |
| commit | 75be7fb7f978202c4c3a1a713af4485afb2ff5f6 (patch) | |
| tree | 34a1c68e50288a6f9004b954c269c65981b83df7 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | 8c91bc3d44dfef8284af384877fbe61117e8b7d1 (diff) | |
sh_eth: fix TRSCER mask for R7S72100
According to the RZ/A1H Group, RZ/A1M Group User's Manual: Hardware,
Rev. 4.00, the TRSCER register has bit 9 reserved, hence we can't use
the driver's default TRSCER mask. Add the explicit initializer for
sh_eth_cpu_data::trscer_err_mask for R7S72100.
Fixes: db893473d313 ("sh_eth: Add support for r7s72100")
Signed-off-by: Sergey Shtylyov <s.shtylyov@omprussia.ru>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions