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| author | Abel Vesa <abel.vesa@linaro.org> | 2024-05-27 10:20:35 +0300 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2024-06-03 19:30:47 +0530 |
| commit | 5314e84c33e7ad61df5203df540626ac59f9dcd9 (patch) | |
| tree | 60e2806b31c1b2f61c0b737eba6653b623a13029 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0 (diff) | |
phy: qcom-qmp: qserdes-txrx: Add missing registers offsets
Currently, the x1e80100 uses pure V6 register offsets for DP part of the
combo PHY. This hasn't been an issue because external DP is not yet
enabled on any of the boards yet. But in order to enabled it, all these
new V6 N4 register offsets are needed. So add them.
Fixes: 762c3565f3c8 ("phy: qcom-qmp: qserdes-txrx: Add V6 N4 register offsets")
Co-developed-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240527-x1e80100-phy-qualcomm-combo-fix-dp-v1-1-be8a0b882117@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions