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| author | Joakim Zhang <qiangqing.zhang@nxp.com> | 2021-02-18 19:00:35 +0800 |
|---|---|---|
| committer | Marc Kleine-Budde <mkl@pengutronix.de> | 2021-03-01 10:34:56 +0100 |
| commit | 449052cfebf624b670faa040245d3feed770d22f (patch) | |
| tree | f19f83604e503cc912ff9f25c09d652b845792c1 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | 447621e373bd1b22300445639b43c39f399e4c73 (diff) | |
can: flexcan: assert FRZ bit in flexcan_chip_freeze()
Assert HALT bit to enter freeze mode, there is a premise that FRZ bit is
asserted. This patch asserts FRZ bit in flexcan_chip_freeze, although
the reset value is 1b'1. This is a prepare patch, later patch will
invoke flexcan_chip_freeze() to enter freeze mode, which polling freeze
mode acknowledge.
Fixes: b1aa1c7a2165b ("can: flexcan: fix transition from and to freeze mode in chip_{,un}freeze")
Link: https://lore.kernel.org/r/20210218110037.16591-2-qiangqing.zhang@nxp.com
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions