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| author | 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> | 2020-05-28 11:15:49 +0800 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2020-05-28 16:13:19 -0700 |
| commit | 440d7a6f73909f4d8fa9b442a3967973fc9d8fac (patch) | |
| tree | e0a2e69463d38c0bd4e216a45ee361802eeca124 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | 424c85e1ffea7a37808a0b6e03066fa7a248eef0 (diff) | |
clk: X1000: Add FIXDIV for SSI clock of X1000.
1.The SSI clock of X1000 not like JZ4770 and JZ4780, they are not
directly derived from the output of SSIPLL, but from the clock
obtained by dividing the frequency by 2. "X1000_CLK_SSIPLL_DIV2"
is added for this purpose, and ensure that it initialized before
"X1000_CLK_SSIMUX" when initializing the clocks.
2.Clocks of LCD, OTG, EMC, EFUSE, OST, TCU, and gates of CPU, PCLK
are also added.
3.Use "CLK_OF_DECLARE_DRIVER" like the other CGU drivers.
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lkml.kernel.org/r/20200528031549.13846-8-zhouyanjie@wanyeetech.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions