diff options
| author | Jonathan Cavitt <jonathan.cavitt@intel.com> | 2023-11-02 10:58:31 -0700 |
|---|---|---|
| committer | Andi Shyti <andi.shyti@linux.intel.com> | 2023-11-06 17:35:32 +0100 |
| commit | 34df0a031d8f3488fe72627b041a1f82437fa6ec (patch) | |
| tree | b996db964689cf4b65a4718e30d921fba6721944 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | 27b086382c22efb7e0a16442f7bdc2e120108ef3 (diff) | |
drm/i915/gt: Temporarily disable CPU caching into DMA for MTL
FIXME: It is suspected that some Address Translation Service (ATS)
issue on IOMMU is causing CAT errors to occur on some MTL workloads.
Applying a write barrier to the ppgtt set entry functions appeared
to have no effect, so we must temporarily use I915_MAP_WC in the
map_pt_dma class of functions on MTL until a proper ATS solution is
found.
Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
CC: Chris Wilson <chris.p.wilson@linux.intel.com>
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Acked-by: Andi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231102175831.872763-1-jonathan.cavitt@intel.com
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions