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| author | Miquel Raynal <miquel.raynal@bootlin.com> | 2019-12-24 15:38:51 +0100 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2020-01-05 12:09:52 +0100 |
| commit | 1e0b0a0cf31a1c2d7770bed904c66c4e71e01311 (patch) | |
| tree | 6ab1059638c69f3f5ac91b21c8556ddceac5d58f /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | d1dc01860a2a2e9a542485b732ece729402c2bd5 (diff) | |
dt-bindings: display: rockchip-lvds: Document PX30 PHY
PX30 SoCs use a single PHY shared by two display pipelines: MIPI DSI
and LVDS. In the case of the LVDS IP, document the possibility to fill
a PHY handle.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20191224143900.23567-3-miquel.raynal@bootlin.com
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
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