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authorCatalin Popescu <catalin.popescu@leica-geosystems.com>2024-04-15 16:03:48 +0200
committerStephen Boyd <sboyd@kernel.org>2024-04-19 19:09:41 -0700
commit1758c68c81b8b881818fcebaaeb91055362a82f8 (patch)
treeab07e1278aba492dc694eb8b1ba7e5f8fafa08e6 /tools/perf/scripts/python/exported-sql-viewer.py
parenta09b2d6a3be5e7856e1a664bcfaaa3dcd6583b91 (diff)
clk: rs9: fix wrong default value for clock amplitude
According to 9FGV0241, 9FGV0441 & 9FGV0841 datasheets, the default value for the clock amplitude is 0.8V, while the driver assumes 0.7V. Additionally, define constants for default values for both clock amplitude and spread spectrum and use them. Fixes: 892e0ddea1aa ("clk: rs9: Add Renesas 9-series PCIe clock generator driver") Signed-off-by: Catalin Popescu <catalin.popescu@leica-geosystems.com> Reviewed-by: Marek Vasut <marex@denx.de> Link: https://lore.kernel.org/r/20240415140348.2887619-1-catalin.popescu@leica-geosystems.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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