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authorJonathan Cameron <[email protected]>2022-05-08 18:56:53 +0100
committerJonathan Cameron <[email protected]>2022-06-14 11:53:18 +0100
commitff3211b2ba9afac80ceb795d148831dd879b30b7 (patch)
treee855d1fcbe4d6214b65f80ad7e8f1ab67e76e7a5 /tools/perf/scripts/python/export-to-sqlite.py
parentae6eeb534924ecc2afd5a394964fd6de0ca54d39 (diff)
iio: gyro: adis16130: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 8e67875141b2 ("staging:iio:gyro: adis16130 cleanup, move to abi and bug fixes.") Signed-off-by: Jonathan Cameron <[email protected]> Acked-by: Nuno Sá <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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