drm/i915: Define the PIPE_CRC_EXP registers

I need a scratch register which fill the following requirements:
- can be accessed via DSB
- all the bits can be read/written
- no serious side effects

So far the only thing I could think of is the "expected CRC"
register. Add the definition so I can use it.

While I only need the hsw+ variant currently, let's define the
older variants as well for completeness.

Signed-off-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Acked-by: Jani Nikula <[email protected]>

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