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| author | Huacai Chen <chenhuacai@loongson.cn> | 2022-12-07 22:06:43 +0800 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2023-02-05 10:55:19 +0000 |
| commit | fc98adb9a8435cdb4e8349138ac0b728df80ade9 (patch) | |
| tree | 051ae11b3867a4da0aa7b4d11a281032c40b4f26 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | e740604232dc5c3097808f3e91fd02d9316010c5 (diff) | |
irqchip/loongson-liointc: Save/restore int_edge/int_pol registers during S3/S4
If int_edge/int_pol registers are configured to not be the default values, we
should save/restore them during S3/S4.
Signed-off-by: Yingkun Meng <mengyingkun@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221207140643.1600743-1-chenhuacai@loongson.cn
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions