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authorAgrawal, Akshu <[email protected]>2018-07-16 15:02:40 +0800
committerMark Brown <[email protected]>2018-07-16 15:30:11 +0100
commitfa9d2f17c23fb3ea6b659b1bfe4ca10551a19e56 (patch)
tree3d24390ec225b3b6e80fe8be531cec034d09d606 /tools/perf/scripts/python/export-to-sqlite.py
parent8452112baac67c3235d15de67fb190d29bbba98f (diff)
ASoC: AMD: Send correct channel for configuring DMA descriptors
Earlier, ch1 was used to define ACP-SYSMEM transfer and ch2 for ACP-I2S transfer. With recent patches ch1 is used to define channel order number 1 and ch2 as channel order number 2. Thus, Playback: ch1:SYSMEM->ACP ch2:ACP->I2S Capture: ch1:I2S->ACP ch1:ACP->SYSMEM Signed-off-by: Akshu Agrawal <[email protected]> Signed-off-by: Mark Brown <[email protected]>
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