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| author | Anson Huang <Anson.Huang@nxp.com> | 2018-05-18 09:01:04 +0800 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2018-06-01 12:14:32 -0700 |
| commit | f93f2ed94a9073b224ca817178562a6281d2eda5 (patch) | |
| tree | 4ab22e19672dac0131e260d3dfafd31292a7f609 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 60cc43fc888428bb2f18f08997432d426a243338 (diff) | |
clk: imx7d: correct enet phy ref clock gates
IMX7D_ENET_PHY_REF_ROOT_DIV supplies clock for PHY directly,
there is no clock gate after it, rename it to
IMX7D_ENET_PHY_REF_ROOT_CLK to avoid device tree change.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions