diff options
| author | Marek Vasut <[email protected]> | 2022-04-13 16:07:10 +0200 |
|---|---|---|
| committer | Vinod Koul <[email protected]> | 2022-04-20 14:45:55 +0530 |
| commit | f7f9abc5eab9d10561d74b20b3e284649e07d82f (patch) | |
| tree | eca2af94d44afb4b7be947fe9c2adafa115793dd /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 1599069a62c6179fdde9f6e5b54d44531064a79c (diff) | |
phy: freescale: imx8m-pcie: Handle IMX8_PCIE_REFCLK_PAD_UNUSED
The 'fsl,refclk-pad-mode' DT property used to select clock source for
PCIe PHY can have either of three values, IMX8_PCIE_REFCLK_PAD_INPUT,
IMX8_PCIE_REFCLK_PAD_OUTPUT, IMX8_PCIE_REFCLK_PAD_UNUSED. The first
two options are handled correctly by the driver, the last one is not,
this patch implements support for the last option.
The IMX8_PCIE_REFCLK_PAD_INPUT means PCIE_RESREF is PHY clock input,
the IMX8_PCIE_REFCLK_PAD_OUTPUT means PHY clock are sourced from SoC
internal PLL and output to PCIE_RESREF external IO pin. The last
IMX8_PCIE_REFCLK_PAD_UNUSED is a combination of previous two, PHY
clock are sourced from SoC internal PLL and not output anywhere.
Reviewed-by: Richard Zhu <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Kishon Vijay Abraham I <[email protected]>
Cc: Marcel Ziswiler <[email protected]>
Cc: NXP Linux Team <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Richard Zhu <[email protected]>
Cc: Shawn Guo <[email protected]>
Cc: Vinod Koul <[email protected]>
Cc: [email protected]
To: [email protected]
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions