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| author | Yuantian Tang <andy.tang@nxp.com> | 2019-04-22 17:15:08 +0800 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2019-04-25 11:22:45 -0700 |
| commit | f34b2c26fc7d120b26cb181b8d4115675ec58244 (patch) | |
| tree | 4d2c4071266a4e4e62fd48319ed5f72dda073f25 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 9e98c678c2d6ae3a17cb2de55d17f69dddaa231b (diff) | |
dt-bindings: qoriq-clock: add more PLL divider clocks support
More PLL divider clocks are needed by clock consumer IP. So update
the PLL divider description to make it more general.
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions