diff options
| author | Sung Lee <[email protected]> | 2020-08-25 15:52:17 -0400 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2020-10-26 13:27:31 -0400 |
| commit | f2459c52c84449c0494365f928d1a0cbe52f23cf (patch) | |
| tree | 161ea126b5402f38f2988243ae1f9a9f2a380dd0 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | a39f2a8d70666ef728497651a16bca4d23ec8816 (diff) | |
drm/amd/display: Add Bounding Box State for Low DF PState but High Voltage State
[WHY]
DF PState and Voltage State are coupled such that one cannot be
raised without raising the other. This uses more power than
is necessary in high bandwidth scenarios.
[HOW]
Add logic to create a new bounding box state that allows for
DF PState to be low while Voltage State is high. Watermarks
vlevel calculation logic was also udpated to assume
state 1 contains the new optimized state.
Signed-off-by: Sung Lee <[email protected]>
Acked-by: Aurabindo Pillai <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions