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| author | Alvin Lee <[email protected]> | 2024-01-04 13:40:04 -0500 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2024-01-15 18:35:39 -0500 |
| commit | f0ec30549a2b6e6a9db7d71001f4b3c1ed45c675 (patch) | |
| tree | 27f902131f661a268faacebf243b3c95c4af20af /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 038c532346418fb5ab09c8fc6d650283d9a02966 (diff) | |
drm/amd/display: Ensure populate uclk in bb construction
[Description]
- For some SKUs, the optimal DCFCLK for each UCLK is less than the
smallest DCFCLK STA target due to low memory bandwidth. There is
an assumption that the DCFCLK STA targets will always be less
than one of the optimal DCFCLK values, but this is not true for
SKUs that have low memory bandwidth. In this case we need to
populate the optimal UCLK for each DCFCLK STA targets as the max
UCLK freq.
- Also fix a bug in DML where start_state is not assigned and used
correctly.
Reviewed-by: Samson Tam <[email protected]>
Reviewed-by: Chaitanya Dhere <[email protected]>
Acked-by: Alex Hung <[email protected]>
Signed-off-by: Alvin Lee <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions