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authorYang Xiwen <forbidden405@outlook.com>2024-02-19 23:05:27 +0800
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2024-04-08 09:29:33 +0200
commitf00a6b9644a5668e25ad9ca5aff53b6de4b0aaf6 (patch)
tree5dc5d2c626fee9f664c804c61249b159c8aac86e /tools/perf/scripts/python/export-to-sqlite.py
parent428a575dc9038846ad259466d5ba109858c0a023 (diff)
arm64: dts: hi3798cv200: add GICH, GICV register space and irq
This is needed by KVM to make use of VGIC code. Just like regular GIC-400, PPI #9 is the hypervisor maintenance interrupt. It has been verified. Signed-off-by: Yang Xiwen <forbidden405@outlook.com> Link: https://lore.kernel.org/r/20240219-cache-v3-2-a33c57534ae9@outlook.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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