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| author | Lizhi Hou <[email protected]> | 2023-01-19 08:32:06 -0800 |
|---|---|---|
| committer | Vinod Koul <[email protected]> | 2023-02-10 11:32:26 +0530 |
| commit | ecf294a6f63f882319485f807754dacaeae96e9d (patch) | |
| tree | a3eb1905b29b4034b834776a3df71321e9d7afd2 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 17ce252266c7f016ece026492c45838f852ddc79 (diff) | |
dmaengine: xilinx: xdma: Add user logic interrupt support
The Xilinx DMA/Bridge Subsystem for PCIe (XDMA) provides up to 16 user
interrupt wires to user logic that generate interrupts to the host.
This patch adds APIs to enable/disable user logic interrupt for a given
interrupt wire index.
Signed-off-by: Lizhi Hou <[email protected]>
Signed-off-by: Sonal Santan <[email protected]>
Signed-off-by: Max Zhen <[email protected]>
Signed-off-by: Brian Xu <[email protected]>
Tested-by: Martin Tuma <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions