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| author | Stephen Boyd <sboyd@kernel.org> | 2020-05-05 12:28:46 -0700 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2020-05-05 12:28:46 -0700 |
| commit | e8b81b1ea35628aa46547f485aef14172513718a (patch) | |
| tree | 615c85e2caa4ddf28fc1ac3c0a2f299f7f1e54b5 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 8f3d9f354286745c751374f5f1fcafee6b3f3136 (diff) | |
| parent | e2f022c10ed3b50ba1d2bb1f037b0e7a84cb1c3e (diff) | |
Merge tag 'clk-renesas-for-v5.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull Renesas clk driver updates from Geert Uytterhoeven:
- Add support for the USB 2.0 clock selector on R-Car M3-W+
- Add support for the new RZ/G1H (R8A7742) SoC
- Minor fixes and cleanups
* tag 'clk-renesas-for-v5.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: rcar-gen2: Remove superfluous CLK_RENESAS_DIV6 selects
clk: renesas: cpg-mssr: Add R8A7742 support
dt-bindings: clock: renesas: cpg-mssr: Document r8a7742 binding
clk: renesas: Add r8a7742 CPG Core Clock Definitions
dt-bindings: power: rcar-sysc: Add r8a7742 power domain index macros
MAINTAINERS: Add DT Bindings for Renesas Clock Generators
clk: renesas: r9a06g032: Fix some typo in comments
dt-bindings: clock: renesas: rcar-usb2-clock-sel: Add r8a77961 support
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions