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authorRodrigo Vivi <[email protected]>2024-05-22 13:01:03 -0400
committerRodrigo Vivi <[email protected]>2024-05-23 11:54:07 -0400
commite7b180b22022f52e3f5fca695cc75d63bddc5a1c (patch)
tree76dc8e4f4dba9d640c8e03742a77645fd7ba9ec2 /tools/perf/scripts/python/export-to-sqlite.py
parent73ba282e7faf625faf26a09861e91a9fd20ea9a8 (diff)
drm/xe: Prepare display for D3Cold
Prepare power-well and DC handling for a full power lost during D3Cold, then sanitize it upon D3->D0. Otherwise we get a bunch of state mismatch. Ideally we could leave DC9 enabled and wouldn't need to move DC9->DC0 on every runtime resume, however, the disable_DC is part of the power-well checks and intrinsic to the dc_off power well. In the future that can be detangled so we can have even bigger power savings. But for now, let's focus on getting a D3Cold, which saves much more power by itself. v2: create new functions to avoid full-suspend-resume path, which would result in a deadlock between xe_gem_fault and the modeset-ioctl. v3: Only avoid the full modeset to avoid the race, for a more robust suspend-resume. Cc: Anshuman Gupta <[email protected]> Cc: Uma Shankar <[email protected]> Tested-by: Francois Dugast <[email protected]> Reviewed-by: Anshuman Gupta <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Rodrigo Vivi <[email protected]>
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