diff options
| author | Sean Christopherson <[email protected]> | 2021-06-22 10:57:07 -0700 |
|---|---|---|
| committer | Paolo Bonzini <[email protected]> | 2021-06-24 18:00:40 -0400 |
| commit | cd6767c334b628cf566db56c778e67f7e6ae2845 (patch) | |
| tree | 6ae85477967b61494dc02a4f503ee21e3d90ba89 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | af098972295aab280b362090aef964d4eb89f63f (diff) | |
KVM: x86/mmu: Ignore CR0 and CR4 bits in nested EPT MMU role
Do not incorporate CR0/CR4 bits into the role for the nested EPT MMU, as
EPT behavior is not influenced by CR0/CR4. Note, this is the guest_mmu,
(L1's EPT), not nested_mmu (L2's IA32 paging); the nested_mmu does need
CR0/CR4, and is initialized in a separate flow.
Signed-off-by: Sean Christopherson <[email protected]>
Message-Id: <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions