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authorRodrigo Siqueira <[email protected]>2024-03-04 11:40:23 -0700
committerAlex Deucher <[email protected]>2024-03-20 13:38:11 -0400
commitbcebe44f6bb6d9a85e0710d0086bc3956e6887ba (patch)
tree786d52fb4badc8856dbf7657eb07603a8ed36e6c /tools/perf/scripts/python/export-to-sqlite.py
parent55fdfddddbbc6365a33757bb009be5f64902c019 (diff)
drm/amd/display: Remove wrong signal from vrr calculation
In some of the merge conflict fixes, one '+' was accidentally left at the beginning of the line. Fortunately, this did not cause any major issues since it acted as a number signal. This commit addresses this issue by removing the extra '+'. Acked-by: Wayne Lin <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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