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| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2020-10-15 22:03:31 +0300 |
|---|---|---|
| committer | Rob Clark <robdclark@chromium.org> | 2020-11-04 08:26:26 -0800 |
| commit | b66ccc571319627931e3e61a72747329387eab45 (patch) | |
| tree | 8d97283e36d408b5acdb6b5692419f3fd3d3f5d4 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | a4ccc37693a271330a46208afbeaed939d54fdbb (diff) | |
drm/msm/dsi_phy_7nm: implement PHY disabling
Implement phy_disable() callback to disable DSI PHY lanes and blocks
when phy is not used.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Fixes: 1ef7c99d145c ("drm/msm/dsi: add support for 7nm DSI PHY/PLL")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions