diff options
| author | Yinbo Zhu <[email protected]> | 2019-03-11 02:16:36 +0000 |
|---|---|---|
| committer | Ulf Hansson <[email protected]> | 2019-04-15 11:55:54 +0200 |
| commit | a46e42712596b51874f04c73f1cdf1017f88df52 (patch) | |
| tree | f8dc1f4e2aa1276f78cd0fe2c42942086bc84934 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 8e9a6919939b8c3bf1bd7cb00cf6c5c7890b4424 (diff) | |
mmc: sdhci-of-esdhc: add erratum eSDHC5 support
Software writing to the Transfer Type configuration register
(system clock domain) can cause a setup/hold violation in the
CRC flops (card clock domain), which can cause write accesses
to be sent with corrupt CRC values. This issue occurs only for
write preceded by read. this erratum is to fix this issue.
Signed-off-by: Yinbo Zhu <[email protected]>
Acked-by: Adrian Hunter <[email protected]>
Signed-off-by: Ulf Hansson <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions