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authorJonathan Cameron <[email protected]>2022-05-08 18:55:59 +0100
committerJonathan Cameron <[email protected]>2022-06-14 11:53:13 +0100
commit9c6c7eff7d4a53efd4d0818f8664259a1862665a (patch)
tree12994135bf2310ee77618a8aef328acb5ce24a8f /tools/perf/scripts/python/export-to-sqlite.py
parent908af45d7057345bc910940a9340f7a1d8935875 (diff)
iio: adc: ad7949: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Note the fixes tag predates some changes to this line of code so automated application of this fix may fail. Fixes: 7f40e0614317 ("iio:adc:ad7949: Add AD7949 ADC driver family") Signed-off-by: Jonathan Cameron <[email protected]> Cc: Charles-Antoine Couret <[email protected]> Acked-by: Nuno Sá <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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