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author | Kevin Hilman <khilman@baylibre.com> | 2017-06-16 11:23:46 -0700 |
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committer | Kevin Hilman <khilman@baylibre.com> | 2017-06-16 11:23:46 -0700 |
commit | 9624dda9f4cb7c9848c2e4cb3c1c1beee13dcbba (patch) | |
tree | 8ff8ed4c75596ccd41cb80cacf8ea2e5c6c1b2d2 /tools/perf/scripts/python/export-to-sqlite.py | |
parent | 27f87bd2900b1a95d9c8e25deeb9768cf3fdcc4e (diff) | |
parent | f40a8ce96ae141f5ec83204471df4902e86a572c (diff) |
Merge tag 'meson-clk-headers-for-4.13' of git://github.com/BayLibre/clk-meson into v4.13/dt64
First round of amlogic clock headers update for v4.13
Only gx related update in this round.
Expose i2s out, spdif out, EE uart gates and SPICC gate.
Un-expose CPU clk which was wrongly copy/pasted from meson8b
* tag 'meson-clk-headers-for-4.13' of git://github.com/BayLibre/clk-meson:
clk: meson-gxbb: un-export the CPU clock
clk: meson-gxbb: expose UART clocks
clk: meson-gxbb: expose SPICC gate
clk: meson-gxbb: expose spdif master clock
clk: meson-gxbb: expose i2s master clock
clk: meson-gxbb: expose spdif clock gates
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions