diff options
| author | Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2022-10-23 23:31:56 +0200 |
|---|---|---|
| committer | Guenter Roeck <linux@roeck-us.net> | 2022-12-04 16:45:02 -0800 |
| commit | 8f2fa4726faf01094d7a5be7bd0c120c565f54d9 (patch) | |
| tree | 1171df03bd4333fbc0e4c0908b7faba3e93e6b51 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 662d20b3a5afee888e805c5326ccdb7ebbd23012 (diff) | |
hwmon: (jc42) Convert register access and caching to regmap/regcache
Switch the jc42 driver to use an I2C regmap to access the registers.
Also move over to regmap's built-in caching instead of adding a
custom caching implementation. This works for JC42_REG_TEMP_UPPER,
JC42_REG_TEMP_LOWER and JC42_REG_TEMP_CRITICAL as these values never
change except when explicitly written. The cache For JC42_REG_TEMP is
dropped (regmap can't cache it because it's volatile, meaning it can
change at any time) as well for simplicity and consistency with other
drivers.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20221023213157.11078-2-martin.blumenstingl@googlemail.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions