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authorThomas Petazzoni <[email protected]>2018-08-02 10:56:25 +0200
committerMiquel Raynal <[email protected]>2018-09-04 23:36:55 +0200
commit88aa3bbfc020d14b13d67af3f5c08aa992d82cd8 (patch)
treeb78f280fe0249391e17eca3e511ceeced336dce8 /tools/perf/scripts/python/export-to-sqlite.py
parent7525c9518ea6feabc8154956df0891a59a69d289 (diff)
mtd: rawnand: marvell: use regmap_update_bits() for syscon access
The marvell_nfc_init() function fiddles with some bits of a system controller on Armada 7K/8K. However, it does a read/modify/write sequence on GENCONF_CLK_GATING_CTRL and GENCONF_ND_CLK_CTRL, which isn't safe from a concurrency point of view, as the regmap lock isn't taken accross the read/modify/write sequence. To solve this issue, use regmap_update_bits(). While at it, since the "reg" variable is no longer needed for the read/modify/write sequences, get rid of it for the regmap_write() to GENCONF_SOC_DEVICE_MUX, and directly pass the value to be written as argument. Fixes: 02f26ecf8c772 ("mtd: nand: add reworked Marvell NAND controller driver") Signed-off-by: Thomas Petazzoni <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
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