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| author | Christophe Leroy <[email protected]> | 2020-05-21 16:56:03 +0000 |
|---|---|---|
| committer | Michael Ellerman <[email protected]> | 2020-05-28 23:24:36 +1000 |
| commit | 797f4016f6da4a90ac83e32b213b68ff7be3812b (patch) | |
| tree | 56241ddf356705d5f9ef08f33b20bc60105d0660 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 455531e9d88048c025ff9099796413df748d92b9 (diff) | |
powerpc/40x: Avoid using r12 in TLB miss handlers
Let's reduce the number of registers used in TLB miss handlers.
We have both r9 and r12 available for any temporary use.
r9 is enough, avoid using r12.
Signed-off-by: Christophe Leroy <[email protected]>
Signed-off-by: Christophe Leroy <[email protected]>
Signed-off-by: Michael Ellerman <[email protected]>
Link: https://lore.kernel.org/r/7f330e971952abb2645fb9ca4310c0f527e84dcb.1590079969.git.christophe.leroy@csgroup.eu
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions