diff options
| author | Siarhei Volkau <[email protected]> | 2023-06-04 14:26:52 +0200 |
|---|---|---|
| committer | Thomas Bogendoerfer <[email protected]> | 2023-06-09 09:54:17 +0200 |
| commit | 6673c2763f6f999fc32cff1833c7d4d6d35f787b (patch) | |
| tree | 4aa5c4647d327aa6dbbba9be82080a78daca5118 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 1e13da548fbffb807633df85a244b70caa90bdf7 (diff) | |
MIPS: uaccess: emulate Ingenic LXW/LXH/LXHU uaccess
The LXW, LXH, LXHU opcodes are part of the MXU ASE found in Ingenic
XBurst based SoCs.
While technically part of the MXU ASE, they do not touch any of the SIMD
registers, and can be used even when the MXU ASE is disabled.
This patch makes it possible to emulate unaligned access for those
instructions.
Signed-off-by: Siarhei Volkau <[email protected]>
Signed-off-by: Thomas Bogendoerfer <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions