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| author | Suzuki K Poulose <[email protected]> | 2020-11-27 10:52:48 -0700 |
|---|---|---|
| committer | Greg Kroah-Hartman <[email protected]> | 2020-11-27 20:23:12 +0100 |
| commit | 60c519c5d3629c21ba356782434d5b612d312de4 (patch) | |
| tree | c22c2e2a0cae36e6fdc646d4a112ddb5120e3fbe /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 6288b4ceca868eac4bf729532f8d845e3ecbed98 (diff) | |
coresight: etm4x: Handle TRCVIPCSSCTLR accesses
TRCVIPCSSCTLR is not present if the TRCIDR4.NUMPC > 0. Thus we
should only access the register if it is present, preventing
any undesired behavior.
Cc: [email protected]
Signed-off-by: Suzuki K Poulose <[email protected]>
Signed-off-by: Mathieu Poirier <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions