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| author | Arnd Bergmann <arnd@arndb.de> | 2024-04-29 10:31:59 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2024-04-29 10:31:59 +0200 |
| commit | 5ac40fdde32f51b3139303b0c1a4f5b99185b54a (patch) | |
| tree | 5d7d094bf1d3dc1c19fb726c0b5bbda0400a8296 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 3a2fb1a95c790bfdbf73860c6345423af9830fad (diff) | |
| parent | a45c3a9b1ef9571741d40bf10f22ce3c60bc5111 (diff) | |
Merge tag 'samsung-dt64-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.10
1. Add FIFO depth to each SPI node so we can avoid matching this through
DTS alias. Difference SPI instances on given SoC have different FIFO
depths.
2. Exynos850: add clock controllers providing clocks to CPUs.
3. Google GS101: few cleanups and add missing serial engine (USI)
interface nodes.
* tag 'samsung-dt64-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: gs101: define all PERIC USI nodes
arm64: dts: exynos: gs101: join lines close to 80 chars
arm64: dts: exynos: gs101: move pinctrl-* properties after clocks
arm64: dts: exynos: gs101: move serial_0 pinctrl-0/names to dtsi
arm64: dts: exynos: gs101: reorder pinctrl-* properties
arm64: dts: exynos850: Add CPU clocks
arm64: dts: exynosautov9: specify the SPI FIFO depth
arm64: dts: exynos5433: specify the SPI FIFO depth
Link: https://lore.kernel.org/r/20240425071856.9235-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
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