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| author | Miquel Raynal <[email protected]> | 2022-04-22 20:06:10 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <[email protected]> | 2022-04-26 13:25:47 +0200 |
| commit | 593dea000bc1f160623f8cf65ad5e47c72f4ec67 (patch) | |
| tree | fefc7f00fe5d8b095f8a0d981675753c5c407727 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | ffd381445eac2aa624e49bab5a811451e8351008 (diff) | |
serial: 8250: dw: Allow to use a fallback CPR value if not synthesized
DW UART controllers can be synthesized without the CPR register.
In this case, allow to the platform information to provide a CPR value.
Co-developed-by: Phil Edworthy <[email protected]>
Reviewed-by: Andy Shevchenko <[email protected]>
Signed-off-by: Phil Edworthy <[email protected]>
Signed-off-by: Miquel Raynal <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions