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authorAric Cyr <[email protected]>2020-07-27 21:21:16 -0400
committerAlex Deucher <[email protected]>2020-08-10 17:26:52 -0400
commit5396fa590df764775e83c9014330bc4112a75f63 (patch)
tree8db9dbdcc164e0d182cb8f61ecd0c0b61e2be279 /tools/perf/scripts/python/export-to-sqlite.py
parentfe04afad4ee144557fbf7196c5746cfe57fbdf47 (diff)
drm/amd/display: Fix incorrect backlight register offset for DCN
[Why] Typo in backlight refactor inctroduced wrong register offset. [How] Change DCE to DCN register map for PWRSEQ_REF_DIV Cc: [email protected] Signed-off-by: Aric Cyr <[email protected]> Reviewed-by: Ashley Thomas <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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