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| author | Claudiu Beznea <[email protected]> | 2023-12-07 09:06:51 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <[email protected]> | 2023-12-13 20:05:55 +0100 |
| commit | 515f05da372aedf347a1ac99d17fb832ba371d4d (patch) | |
| tree | b63cab6d9da22659ccf29316430c413c150710f6 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | da235d2fac212d0add570e755feb1167a830bc99 (diff) | |
clk: renesas: r9a08g045: Add clock and reset support for ETH0 and ETH1
RZ/G3S has 2 Gigabit Ethernet interfaces available. Add clock and reset
support for both of them.
Signed-off-by: Claudiu Beznea <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions