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| author | Miquel Raynal <miquel.raynal@bootlin.com> | 2019-06-27 14:52:42 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2019-10-03 14:00:20 -0700 |
| commit | 4d8fb4948472c976d0c6dcf3380f92332dd660c1 (patch) | |
| tree | d06593bfe388c37f793d0b36f8e2680729046702 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 54ecb8f7028c5eb3d740bb82b0f1d90f2df63c5c (diff) | |
clk: mvebu: armada-37xx-periph: add PCIe gated clock
The PCIe clock is a gated clock which has the same source as GbE0
(both IPs share a set of registers). This source clock is called
'gbe_core' in the driver.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lkml.kernel.org/r/20190627125245.26788-2-miquel.raynal@bootlin.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions