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author | Changbin Du <changbin.du@intel.com> | 2018-01-30 19:19:49 +0800 |
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committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2018-03-06 13:19:18 +0800 |
commit | 44b467338094d86586d3ec351d8594a6cef0842a (patch) | |
tree | 9f1bdc0ee3d4791c2caf3798adcdc1521c0f02a7 /tools/perf/scripts/python/export-to-sqlite.py | |
parent | 72f03d7ea16794c3ac4b7ae945510cf0015d3c3c (diff) |
drm/i915/gvt: Rework shadow page management code
This is a another big one and the GVT shadow page management code is
heavily refined.
The new code only use struct intel_vgpu_ppgtt_spt to represent a vgpu
shadow page table - w/ or wo/ a guest page associated with. A pure shadow
page (no guest page associated) will be used to shadow splited 2M huge
gtt. In this case, the spt.guest_page.gfn should be a zero.
To search a existed shadow page table, we have two new interfaces:
- intel_vgpu_find_spt_by_gfn(), find a spt by guest gfn. It must not
be a pure spt.
- intel_vgpu_find_spt_by_mfn, Find the spt using shadow page mfn in
shadowed PTE.
The oos_page management is remained as what is was.
v2: Split some changes into small standalone patches.
Signed-off-by: Changbin Du <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
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