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authorRobert Marko <robimarko@gmail.com>2022-08-19 00:06:21 +0200
committerBjorn Andersson <andersson@kernel.org>2022-09-26 21:40:10 -0500
commit43a56cbf2a38170b02db29654607575b1b4b5bc0 (patch)
tree1311fbb72782184535979d02848509ab08c3d4ec /tools/perf/scripts/python/export-to-sqlite.py
parentc5d2c96b3a7bd8987fad9957510034130037fccf (diff)
clk: qcom: apss-ipq6018: fix apcs_alias0_clk_src
While working on IPQ8074 APSS driver it was discovered that IPQ6018 and IPQ8074 use almost the same PLL and APSS clocks, however APSS driver is currently broken. More precisely apcs_alias0_clk_src is broken, it was added as regmap_mux clock. However after debugging why it was always stuck at 800Mhz, it was figured out that its not regmap_mux compatible at all. It is a simple mux but it uses RCG2 register layout and control bits, so utilize the new clk_rcg2_mux_closest_ops to correctly drive it while not having to provide a dummy frequency table. While we are here, use ARRAY_SIZE for number of parents. Tested on IPQ6018-CP01-C1 reference board and multiple IPQ8074 boards. Fixes: 5e77b4ef1b19 ("clk: qcom: Add ipq6018 apss clock controller") Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220818220628.339366-2-robimarko@gmail.com
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