diff options
author | Peter Ujfalusi <[email protected]> | 2024-04-03 13:52:10 +0300 |
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committer | Mark Brown <[email protected]> | 2024-04-03 12:04:28 +0100 |
commit | 40bdf121a3ed91281196068e50789888e4b1d2d2 (patch) | |
tree | 7fc68e196bf72c2d4fd527993f8a4cca575c5d9d /tools/perf/scripts/python/export-to-sqlite.py | |
parent | 3dc2682870ea8f5a7749c069dfc4e0040e69cb5d (diff) |
ASoC: SOF: Intel: mtl: Correct the mtl_dsp_dump output
The ROM/firmware state handling has changed between CAVS and ACE
architecture:
CAVS: ROM and firmware uses the SRAM window for the state and status/error
code reporting
ACE: ROM code is using two registers to report the state and error while
the firmware is using the SRAM window to report states and status/error
codes.
Use the generic hda_dsp_get_state() to decode ROM state and error codes and
print out the firmware state and status/error code only if the SRAM
window is accessible - the firmware is booted and the Status readout is
not 0xffffffff.
Signed-off-by: Peter Ujfalusi <[email protected]>
Reviewed-by: Rander Wang <[email protected]>
Reviewed-by: Kai Vehmanen <[email protected]>
Reviewed-by: Pierre-Louis Bossart <[email protected]>
Reviewed-by: Liam Girdwood <[email protected]>
Link: https://msgid.link/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions