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| author | Keerthy <[email protected]> | 2023-04-19 09:30:06 +0530 |
|---|---|---|
| committer | Vignesh Raghavendra <[email protected]> | 2023-06-06 23:02:21 +0530 |
| commit | 3d011933000ed9054c649952d83162d24f020a93 (patch) | |
| tree | d0c82ac67f5ed946542bb7af2caa3f3b6c09fdb5 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | cf39ff15cc01adea0ec46d1571d5ae849bb02d43 (diff) | |
arm64: dts: ti: k3-j7200: Fix physical address of pin
wkup_pmx splits into multiple regions. Like
wkup_pmx0 -> 13 pins (WKUP_PADCONFIG 0 - 12)
wkup_pmx1 -> 2 pins (WKUP_PADCONFIG 14 - 15)
wkup_pmx2 -> 59 pins (WKUP_PADCONFIG 26 - 84)
wkup_pmx3 -> 8 pins (WKUP_PADCONFIG 93 - 100)
With this split, pin offset needs to be adjusted to
match with new pmx for all pins above wkup_pmx0.
Example a pin under wkup_pmx1 should start from 0 instead of
old offset(0x38 WKUP_PADCONFIG 14 offset)
J7200 Datasheet (Table 6-106, Section 6.4 Pin Multiplexing) :
https://www.ti.com/lit/ds/symlink/dra821u.pdf
Fixes: 9ae21ac445e9 ("arm64: dts: ti: k3-j7200: Fix wakeup pinmux range")
Signed-off-by: Keerthy <[email protected]>
Signed-off-by: Udit Kumar <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions